Stress analysis of Cu/low-k interconnect structure during whole Cu-CMP process using finite element method

The stresses of Cu/low-k interconnect structure during the whole Cu-CMP process were studied based on finite element method to analyze the interfacial delamination and fracture of the low-k layer. Effects of the polishing down pressure, low-k modulus, barrier modulus, Cu film thickness, and the coefficient of friction (COF) on the stress distribution were investigated. Simulation results revealed that the probabilities of both interfacial delamination and fracture of low-k layer during all three polishing steps were raised as increasing the polishing down pressure, barrier modulus, and the COF; while increase of low-k modulus made the probabilities decreased. The COF mainly affected interfacial delamination. During bulk Cu removal step, it can be seen that the decrease of Cu thickness made the probability of interfacial delamination increased, but had little effect on the fracture of low-k layer. Among three polishing steps, it was during the barrier polishing step that the risk of interfacial delamination between barrier layer and low-k layer was the largest, at the corner of interconnect structure interface; while the probability of fracture of low-k layer was the highest during overpolishing step, at the corner of low-k layer surface. Moreover, during the same polishing step, effects of the same parameter on interfacial delamination and on fracture of low-k layer were compared.