Evidences for vertical charge dipole formation in charge-trapping memories and its impact on reliability

We demonstrate the formation of a vertical charge dipole in the nitride layer of TaN/Al2O3/Si3N4/SiO2/Si memories and use dedicated experiments and device simulations to investigate its dependence on program and erase conditions. We show that the polarity of the dipole depends on the program/erase operation sequence and demonstrate that it is at the origin of the charge losses observed during retention. This dipole severely affects the retention of mildly programmed and erased states, representing a serious reliability concern especially for multi-level applications.