Application of Enhanced Phase-Locked Loop System to the Computation of Synchrophasors

This paper introduces the application of an enhanced phase-locked loop (EPLL) system to the estimation of synchrophasors in a phasor measurement unit (PMU). The major concern is accurate estimation within off-nominal frequency operation of the system. The well-known technique based on discrete Fouri...

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Veröffentlicht in:IEEE transactions on power delivery 2011-01, Vol.26 (1), p.22-32
Hauptverfasser: Karimi-Ghartemani, M, Boon-Teck Ooi, Bakhshai, A
Format: Artikel
Sprache:eng
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Zusammenfassung:This paper introduces the application of an enhanced phase-locked loop (EPLL) system to the estimation of synchrophasors in a phasor measurement unit (PMU). The major concern is accurate estimation within off-nominal frequency operation of the system. The well-known technique based on discrete Fourier transform (DFT) can provide accurate estimation of the phasors in a three-phase balanced system. However, the negative-sequence component causes errors to the DFT estimates. The DFT cannot accomplish this task in a single-phase system. The EPLL is shown to be a solution for those shortcomings of the DFT technique, both in single-phase and in unbalanced three-phase systems, at the expense of some more complicated structure. Extensive steady-state and dynamic tests are performed and the results are presented and discussed.
ISSN:0885-8977
1937-4208
DOI:10.1109/TPWRD.2010.2064341