Defuzzification block: New algorithms, and efficient hardware and software implementation issues

The defuzzification is a critical block when implementing a fuzzy inference engine due to different variations and also high computational power demands of defuzzification algorithms. These various methods stand for different cost-accuracy trade-off points. Three new implementation friendly defuzzification algorithms are presented in this paper and compared with a complete set of existing defuzzification methods. Some accuracy analysis simulation results and analytic studies are provided to demonstrate that these methods provide acceptable precision with respect to other existing methods. The software models of the proposed and exiting defuzzification methods are developed under three well-known platforms, Intel's Pentium IV, IBM's PowerPC, and TI's C62 DSP to show that new methods gain much lower execution-time and instruction-count with respect to the most common existing methods. The hardware models of all these methods are also developed and synthesized to demonstrate the superiority of the new methods in terms of area, delay, and power consumption with respect to other methods when implemented in hardware.