FPGA-based Novel Adaptive Scheme Using PN Sequences for Self-Calibration and Self-Testing of MEMS-based Inertial Sensors

We propose a novel adaptive technique based on pseudo-random (PN) sequences for self-calibration and self-testing of MEMS-based inertial sensors (accelerometers and gyroscopes). The method relies on using a parameterized behavioral model implemented on FPGA, whose parameters values are adaptively tu...

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Veröffentlicht in:Journal of electronic testing 2012-10, Vol.28 (5), p.599-614
Hauptverfasser: Sarraf, Elie H., Kansal, Ankit, Sharma, Mrigank, Cretu, Edmond
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Sprache:eng
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Zusammenfassung:We propose a novel adaptive technique based on pseudo-random (PN) sequences for self-calibration and self-testing of MEMS-based inertial sensors (accelerometers and gyroscopes). The method relies on using a parameterized behavioral model implemented on FPGA, whose parameters values are adaptively tuned, based on the response to test pseudo-random actuation of the physical structure. Dedicated comb drives actuate the movable mass with binary maximum length pseudo - random sequences of small amplitude, to keep the device within the linear operating regime. The frequency of the stimulus is chosen within the mechanical spectral operating range of the micro-device, such that the induced response leads to the identification of the mechanical transfer function, and to the tuning of the associated digital behavioral model. In case of a micro-gyroscope, experimental results demonstrate the adaptive tracking of the damping coefficient from 5.57 × 10 −5   Kg / s to 7.12 × 10 −5   Kg / s and of the stiffness coefficient from 132  N / m to 137.7  N / m . In the case of a MEMS accelerometer, the damping and stiffness coefficients are correctly tracked from 3.4 × 10 −3   Kg / s and 49.56  N / m to 4.57 × 10 −3   Kg / s and 51.48  N / m , respectively—the former values are designer-specified target values, while the latter are experimentally measured parameters for fabricated devices operating in a real environment. Hardware resources estimation confirms the small area the proposed algorithm occupies on the targeted FPGA device.
ISSN:0923-8174
1573-0727
DOI:10.1007/s10836-012-5336-x