Single event transient pulse attenuation effect in three-transistor inverter chain

In this paper, compared with two-transistor （2T） inverter chain, the production and propagation of P-hit single event transient （SET） in three-transistor （3T） inverter chain is studied in depth based on three-dimensional numerical simulations in a 90 nm bulk complementary metal oxide semiconductor （CMOS） technology. The pulse attenuation effect is found in 3T inverter chain, and the pulse can not completely propagate through the inverter chain as LET increases. The discovery will provide a new insight into SET hardened design, the 3T inverter layout structure （or similar layout structures） will be a better method in integrated circuits （ICs） design in radiation environment.