Modeling and extraction technique for parasitic resistances in MOSFETs Combining DC I–V and low frequency C–V measurement

► We propose a simple technique for a separate extraction of parasitic and extrinsic resistances in individual MOSFETs. ► The current path-dependent source resistance is also fully separated from the current path-dependent drain resistance. ► It combines easy-accessible lab-basic I–V and parallel mode C–V equipment. ► Multiple devices or complicated S-parameter characterization is not needed. Accurate extraction of parasitic gate (RG), source (RS), drain (RD), and substrate (Rsub) resistances in MOSFETs is important in the modeling and characterization for DC and RF applications. Combining DC current–voltage and low-frequency capacitance–voltage characteristics with an equivalent circuit, we report a simple technique for a complete and separate extraction of parasitic resistances (RG, RS, RD, and Rsub) in individual MOSFETs without employing multiple devices or complicated S-parameter characterization with various device combinations. Intrinsic spreading component is also separated from the contact-related extrinsic component in RS and RD.