Effects of different tunnel layers on retention characteristics for Pd-nanocrystal-based nonvolatile memory

[Display omitted] ► Pd metal cannot be separated well into Pd nanocrystals on SiO2 at room temperature. ► Pd nanocrystals are produced very easily on HfAlO at room temperature. ► Fewer induced defects in HfAlO film result in a better retention characteristic. ► The degradation of retention characteristic is obvious with annealing temperature. Thin Pd metal cannot be separated well into Pd nanocrystals (NCs) on 4-nm-thick SiO2/Si, but the Pd nanocrystals about 5nm in diameter can be produced very easily on 4-nm-thick HfAlO/Si at room temperature. Owing to a huge thermal stress in SiO2 film during Pd nanocrystal formation at 500°C; it results in a large number of leakage current paths and shallow traps in SiO2 film, which leads to a worse retention characteristics. From some material and electrical analyses, these induced defects mainly result from the interfacial reaction and thermal stress due to different coefficients of thermal expansion between Pd and tunnel layer during Pd annealing. However, fewer leakage current paths and shallow traps in HfAlO film result in a better retention characteristic. The degradation of retention characteristic is more obvious with annealing temperature, and the final memory window is 0.95V for 900°C annealed Pd NCs nonvolatile memory with HfAlO tunnel oxide.