Characterization of single-sided gate-to-drain non-overlapped implantation nMOSFETs for multi-functional non-volatile memory applications

► Single-sided non-overlapped implantation nMOSFETs for multiple memory functions. ► Mask ROMs programmed by the source drain extension (SDE) implantation. ► EEPROMs programmed by trapping charges in the side-wall nitride spacers. ► Antifuses programmed by introducing the punch-through stress at the...

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Veröffentlicht in:	Solid-state electronics 2012-02, Vol.68, p.73-79
Hauptverfasser:	Jeng, E.S., Chen, Y.F., Chang, C.C., Peng, K.M., Chou, S.W., Ho, C.W., Huang, C.F., Gong, J.
Format:	Artikel
Sprache:	eng
Schlagworte:	Antifuse Antifuses Applied sciences Charge-trapping CMOS Design. Technologies. Operation analysis. Testing Devices Drains EEPROM Electronics Exact sciences and technology Implantation Integrated circuits Integrated circuits by function (including memories and processors) Mask ROM Masks Non-overlapped implantation Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Transistors
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