Characterization of single-sided gate-to-drain non-overlapped implantation nMOSFETs for multi-functional non-volatile memory applications

► Single-sided non-overlapped implantation nMOSFETs for multiple memory functions. ► Mask ROMs programmed by the source drain extension (SDE) implantation. ► EEPROMs programmed by trapping charges in the side-wall nitride spacers. ► Antifuses programmed by introducing the punch-through stress at the drain side. Novel single-sided non-overlapped implantation (SNOI) nMOSFETs are characterized for their capability of multiple programmable memory functions. These devices can be operated as mask ROMs, EEPROMs or anti-fuses by using a pure logic processing. To function as mask ROMs, they can be mask-coded with the source drain extension (SDE) implantation. They can also be used as EEPROM devices by trapping charges in the side-wall nitride spacers. Furthermore, SNOI devices can be used as antifuses by introducing the punch-through stress at the drain side. The SNOI devices were successfully demonstrated for antifuse operations with an extremely high program/initial readout current ratio exceeding 10 9 and a program speed as high as 1 μs. These novel SNOI devices not only provide non-volatile memory solutions in standard CMOS processing but also give a flexible choice among mask ROM, antifuse and EEPROM functions.