Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric
The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si 3 N 4 films were in situ annealed in either H 2 (2%)/O 2 at 950/spl deg/C or N 2 O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si 3 N...
Gespeichert in:
| Veröffentlicht in: | IEEE electron device letters 2002-03, Vol.23 (3), p.124-126 |
|---|---|
| Hauptverfasser: | , , , , , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 126 |
|---|---|
| container_issue | 3 |
| container_start_page | 124 |
| container_title | IEEE electron device letters |
| container_volume | 23 |
| creator | Lin, W.H. Pey, K.L. Dong, Z. Choi, S.Y.-M. Zhou, M.S. Ang, T.C. Ang, C.H. Lau, W.S. Ye, J.H. |
| description | The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si 3 N 4 films were in situ annealed in either H 2 (2%)/O 2 at 950/spl deg/C or N 2 O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si 3 N 4 /Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H 2 (2%)/O 2 anneal exhibit a lower gate leakage current and improved reliability compared to that of N 2 O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si 3 N 4 film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 μm n-MOSFET device. |
| doi_str_mv | 10.1109/55.988812 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_journals_992868327</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>988812</ieee_id><sourcerecordid>2629156571</sourcerecordid><originalsourceid>FETCH-LOGICAL-i199t-472ab0b66eb8fc9c7d8ffc14ca3266b7b61d6fd2afa9d7b2f00a22ca897fd99b3</originalsourceid><addsrcrecordid>eNo1kDtPxDAQhC0EEuGgoKWy6HP4FT9KdDoOpBMUgCgjP9bg05GExFfw77EIVLMafbuzGoQuKVlSSsxN0yyN1pqyI1TRptE1aSQ_RhVRgtacEnmKzqZpRwgVQokKva1jBJ8n3Ec89FOuAxRJOfUdtl0Hdo_LlD8Aw75wY_LFGcZ-gDEn-F17TvxR4HebAYf0T52jk2j3E1z86QK93q1fVvf19mnzsLrd1okak2uhmHXESQlOR2-8CjpGT4W3nEnplJM0yBiYjdYE5VgkxDLmrTYqBmMcX6Dr-W756esAU253_WHsSmRrDNNSc6YKdDVDCQDaYUyfdvxu5574Dz8zW4k</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>992868327</pqid></control><display><type>article</type><title>Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric</title><source>IEEE Electronic Library (IEL)</source><creator>Lin, W.H. ; Pey, K.L. ; Dong, Z. ; Choi, S.Y.-M. ; Zhou, M.S. ; Ang, T.C. ; Ang, C.H. ; Lau, W.S. ; Ye, J.H.</creator><creatorcontrib>Lin, W.H. ; Pey, K.L. ; Dong, Z. ; Choi, S.Y.-M. ; Zhou, M.S. ; Ang, T.C. ; Ang, C.H. ; Lau, W.S. ; Ye, J.H.</creatorcontrib><description>The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si 3 N 4 films were in situ annealed in either H 2 (2%)/O 2 at 950/spl deg/C or N 2 O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si 3 N 4 /Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H 2 (2%)/O 2 anneal exhibit a lower gate leakage current and improved reliability compared to that of N 2 O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si 3 N 4 film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 μm n-MOSFET device.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/55.988812</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Chemicals ; Hydrogen ; Leakage current ; MOSFET circuits ; Oxidation ; Rapid thermal annealing ; Semiconductor films ; Silicon ; Spectroscopy ; Thickness measurement</subject><ispartof>IEEE electron device letters, 2002-03, Vol.23 (3), p.124-126</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2002</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/988812$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>315,782,786,798,27933,27934,54767</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/988812$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lin, W.H.</creatorcontrib><creatorcontrib>Pey, K.L.</creatorcontrib><creatorcontrib>Dong, Z.</creatorcontrib><creatorcontrib>Choi, S.Y.-M.</creatorcontrib><creatorcontrib>Zhou, M.S.</creatorcontrib><creatorcontrib>Ang, T.C.</creatorcontrib><creatorcontrib>Ang, C.H.</creatorcontrib><creatorcontrib>Lau, W.S.</creatorcontrib><creatorcontrib>Ye, J.H.</creatorcontrib><title>Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si 3 N 4 films were in situ annealed in either H 2 (2%)/O 2 at 950/spl deg/C or N 2 O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si 3 N 4 /Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H 2 (2%)/O 2 anneal exhibit a lower gate leakage current and improved reliability compared to that of N 2 O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si 3 N 4 film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 μm n-MOSFET device.</description><subject>Chemicals</subject><subject>Hydrogen</subject><subject>Leakage current</subject><subject>MOSFET circuits</subject><subject>Oxidation</subject><subject>Rapid thermal annealing</subject><subject>Semiconductor films</subject><subject>Silicon</subject><subject>Spectroscopy</subject><subject>Thickness measurement</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2002</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo1kDtPxDAQhC0EEuGgoKWy6HP4FT9KdDoOpBMUgCgjP9bg05GExFfw77EIVLMafbuzGoQuKVlSSsxN0yyN1pqyI1TRptE1aSQ_RhVRgtacEnmKzqZpRwgVQokKva1jBJ8n3Ec89FOuAxRJOfUdtl0Hdo_LlD8Aw75wY_LFGcZ-gDEn-F17TvxR4HebAYf0T52jk2j3E1z86QK93q1fVvf19mnzsLrd1okak2uhmHXESQlOR2-8CjpGT4W3nEnplJM0yBiYjdYE5VgkxDLmrTYqBmMcX6Dr-W756esAU253_WHsSmRrDNNSc6YKdDVDCQDaYUyfdvxu5574Dz8zW4k</recordid><startdate>200203</startdate><enddate>200203</enddate><creator>Lin, W.H.</creator><creator>Pey, K.L.</creator><creator>Dong, Z.</creator><creator>Choi, S.Y.-M.</creator><creator>Zhou, M.S.</creator><creator>Ang, T.C.</creator><creator>Ang, C.H.</creator><creator>Lau, W.S.</creator><creator>Ye, J.H.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>RIA</scope><scope>RIE</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>200203</creationdate><title>Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric</title><author>Lin, W.H. ; Pey, K.L. ; Dong, Z. ; Choi, S.Y.-M. ; Zhou, M.S. ; Ang, T.C. ; Ang, C.H. ; Lau, W.S. ; Ye, J.H.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i199t-472ab0b66eb8fc9c7d8ffc14ca3266b7b61d6fd2afa9d7b2f00a22ca897fd99b3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2002</creationdate><topic>Chemicals</topic><topic>Hydrogen</topic><topic>Leakage current</topic><topic>MOSFET circuits</topic><topic>Oxidation</topic><topic>Rapid thermal annealing</topic><topic>Semiconductor films</topic><topic>Silicon</topic><topic>Spectroscopy</topic><topic>Thickness measurement</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lin, W.H.</creatorcontrib><creatorcontrib>Pey, K.L.</creatorcontrib><creatorcontrib>Dong, Z.</creatorcontrib><creatorcontrib>Choi, S.Y.-M.</creatorcontrib><creatorcontrib>Zhou, M.S.</creatorcontrib><creatorcontrib>Ang, T.C.</creatorcontrib><creatorcontrib>Ang, C.H.</creatorcontrib><creatorcontrib>Lau, W.S.</creatorcontrib><creatorcontrib>Ye, J.H.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lin, W.H.</au><au>Pey, K.L.</au><au>Dong, Z.</au><au>Choi, S.Y.-M.</au><au>Zhou, M.S.</au><au>Ang, T.C.</au><au>Ang, C.H.</au><au>Lau, W.S.</au><au>Ye, J.H.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2002-03</date><risdate>2002</risdate><volume>23</volume><issue>3</issue><spage>124</spage><epage>126</epage><pages>124-126</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si 3 N 4 films were in situ annealed in either H 2 (2%)/O 2 at 950/spl deg/C or N 2 O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si 3 N 4 /Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H 2 (2%)/O 2 anneal exhibit a lower gate leakage current and improved reliability compared to that of N 2 O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si 3 N 4 film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 μm n-MOSFET device.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/55.988812</doi><tpages>3</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0741-3106 |
| ispartof | IEEE electron device letters, 2002-03, Vol.23 (3), p.124-126 |
| issn | 0741-3106 1558-0563 |
| language | eng |
| recordid | cdi_proquest_journals_992868327 |
| source | IEEE Electronic Library (IEL) |
| subjects | Chemicals Hydrogen Leakage current MOSFET circuits Oxidation Rapid thermal annealing Semiconductor films Silicon Spectroscopy Thickness measurement |
| title | Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-02T23%3A34%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Effects%20of%20post-deposition%20anneal%20on%20the%20electrical%20properties%20of%20Si3N4%20gate%20dielectric&rft.jtitle=IEEE%20electron%20device%20letters&rft.au=Lin,%20W.H.&rft.date=2002-03&rft.volume=23&rft.issue=3&rft.spage=124&rft.epage=126&rft.pages=124-126&rft.issn=0741-3106&rft.eissn=1558-0563&rft.coden=EDLEDZ&rft_id=info:doi/10.1109/55.988812&rft_dat=%3Cproquest_RIE%3E2629156571%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=992868327&rft_id=info:pmid/&rft_ieee_id=988812&rfr_iscdi=true |