Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric
The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si 3 N 4 films were in situ annealed in either H 2 (2%)/O 2 at 950/spl deg/C or N 2 O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si 3 N...
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Veröffentlicht in: | IEEE electron device letters 2002-03, Vol.23 (3), p.124-126 |
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Sprache: | eng |
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Zusammenfassung: | The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si 3 N 4 films were in situ annealed in either H 2 (2%)/O 2 at 950/spl deg/C or N 2 O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si 3 N 4 /Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H 2 (2%)/O 2 anneal exhibit a lower gate leakage current and improved reliability compared to that of N 2 O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si 3 N 4 film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 μm n-MOSFET device. |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/55.988812 |