A [Formula Omitted] Integrated CMOS Frequency Synthesizer for [Formula Omitted]-Band Satellite Communications

A [Formula Omitted] integrated frequency synthesizer is implemented in 65-nm CMOS. It has been integrated in a two-step zero-IF millimeter-wave transceiver for emerging applications, such as [Formula Omitted] satellite communication, short-distance high-speed wireless link, as well as imaging and radar. The transceiver utilizes synthesizer voltage-controlled oscillator (VCO) output as the first [Formula Omitted] and 1/8 of [Formula Omitted] as the second [Formula Omitted] to cover the desired frequency band. The proposed synthesizer adopts integer-[Formula Omitted] architecture with 50-MHz reference. It also features coarse phase rotation to provide beam-forming capability for the intended transceiver. The synthesizer phase noise (PN) has been measured at 1/8 of the VCO frequency, about [Formula Omitted] @ 1-MHz offset, and the measured reference spur for [Formula Omitted] is less than [Formula Omitted]. Thus, the extrapolated PN performance is better than [Formula Omitted] @ 1 MHz at [Formula Omitted]. The embedded frequency synthesizer occupies [Formula Omitted] chip area, including the angular rotator and buffers, and consumes 65 mW under 1-V supply.