Probabilistic delay budget assignment for synthesis of soft real-time applications

Unlike their hard real-time counterparts, soft real-time applications are only expected to guarantee their "expected delay" over input data space. This paradigm shift calls for customized statistical design techniques to replace the conventional pessimistic worst case analysis methodologie...

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Veröffentlicht in:IEEE transactions on very large scale integration (VLSI) systems 2006-08, Vol.14 (8), p.843-853
Hauptverfasser: Ghiasi, S., Po-Kuan Huang, Jafari, R.
Format: Artikel
Sprache:eng
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Zusammenfassung:Unlike their hard real-time counterparts, soft real-time applications are only expected to guarantee their "expected delay" over input data space. This paradigm shift calls for customized statistical design techniques to replace the conventional pessimistic worst case analysis methodologies. We present a novel statistical time-budgeting algorithm to translate the application expected delay constraint into its components' local delay constraints. We utilize the mathematical properties of the problem to quickly calculate the system expected delay and incrementally estimate the component utility variation with its timing relaxation. Our algorithm determines the optimal maximum weighted timing relaxation of an application under expected delay constraint. Experimental results on core-based synthesis of several multimedia applications targeting field-programmable gate arrays show that our technique always improves the design area. Furthermore, it consistently outperforms optimal time budgeting under hard real-time constraint, which is the best existing competitor. Design area improvements were up to 26% and averaged about 17% on several MediaBench applications
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2006.878472