A power-scalable reconfigurable FFT/IFFT IC based on a multi-processor ring

A single-chip reconfigurable FFT/IFFT processor that employs a ring-structured multiprocessor architecture is presented. Multi-level reconfigurability is realized by dynamically allocating computation resources needed by specific applications. The processor IC was fabricated in 0.25-/spl mu/m CMOS....

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Veröffentlicht in:	IEEE journal of solid-state circuits 2006-02, Vol.41 (2), p.483-495
Hauptverfasser:	Guichang Zhong, Fan Xu, Willson, A.N.
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Applied sciences ASIC cached-FFT Circuits CMOS Communication standards Design. Technologies. Operation analysis. Testing Digital signal processing digital signal processor (DSP) Digital signal processors Electronics Energy efficiency Energy use Exact sciences and technology fast Fourier transform (FFT) Fast Fourier transforms Flexibility Flexible printed circuits Integrated circuits Integrated circuits by function (including memories and processors) inverse FFT (IFFT) Microprocessors multi-processor OFDM modulation Pipelines Power dissipation programmable reconfigurable scalable Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal processing algorithms Tradeoffs
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