Frequency multiply circuit for superconducting A/D converter
A new frequency multiply circuit generating a 20 GHz sampling clock from an external 5 GHz signal for a lowpass sigma-delta modulator was proposed and designed. The multiply circuit was composed of a ladder circuit, a modified Josephson transmission line (JTL) and T-flip flop (T-FF). We confirmed by...
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| Veröffentlicht in: | IEEE transactions on applied superconductivity 2005-06, Vol.15 (2), p.431-434 |
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| container_title | IEEE transactions on applied superconductivity |
| container_volume | 15 |
| creator | Yoshida, A. Hirano, S. Suzuki, H. Hasuo, S. Tanabe, K. Ito, T. Himi, T. Takai, H. |
| description | A new frequency multiply circuit generating a 20 GHz sampling clock from an external 5 GHz signal for a lowpass sigma-delta modulator was proposed and designed. The multiply circuit was composed of a ladder circuit, a modified Josephson transmission line (JTL) and T-flip flop (T-FF). We confirmed by numerical simulation that the period jitter of SFQ pulse trains generated by the ladder circuit could be reduced to a value small enough to realize 14-bit resolution for 10 MHz bandwidth by utilizing the repulsion effect between SFQ pulses in the modified JTL. The multiply circuit was fabricated by a 2.5 kA/cm/sup 2/ Nb process, and its correct operation was confirmed. |
| doi_str_mv | 10.1109/TASC.2005.849867 |
| format | Article |
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The multiply circuit was composed of a ladder circuit, a modified Josephson transmission line (JTL) and T-flip flop (T-FF). We confirmed by numerical simulation that the period jitter of SFQ pulse trains generated by the ladder circuit could be reduced to a value small enough to realize 14-bit resolution for 10 MHz bandwidth by utilizing the repulsion effect between SFQ pulses in the modified JTL. The multiply circuit was fabricated by a 2.5 kA/cm/sup 2/ Nb process, and its correct operation was confirmed.</description><identifier>ISSN: 1051-8223</identifier><identifier>EISSN: 1558-2515</identifier><identifier>DOI: 10.1109/TASC.2005.849867</identifier><identifier>CODEN: ITASE9</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Analog-to-digital converter ; Applied sciences ; Circuit properties ; Circuits ; Clocks ; Delta-sigma modulation ; Design. Technologies. Operation analysis. Testing ; Digital circuits ; Distributed parameter circuits ; Electric, optical and optoelectronic circuits ; Electronic circuits ; Electronics ; Exact sciences and technology ; Frequency conversion ; frequency multiply circuit ; Integrated circuits ; Jitter ; Josephson device ; Ladders ; Modulators ; Numerical simulation ; Pulse circuits ; rapid single flux quantum circuit ; Sampling ; Sampling methods ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; sigma-delta modulator ; Signal convertors ; Signal design ; Signal generators ; Superconducting transmission lines ; Superconductivity ; Trains</subject><ispartof>IEEE transactions on applied superconductivity, 2005-06, Vol.15 (2), p.431-434</ispartof><rights>2005 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2005</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c415t-847d8f598c57da5e41b5e532f0b1479e988ac06998b2dbaaa490d05b96e10a7e3</citedby><cites>FETCH-LOGICAL-c415t-847d8f598c57da5e41b5e532f0b1479e988ac06998b2dbaaa490d05b96e10a7e3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1439667$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,314,776,780,785,786,792,23910,23911,25119,27903,27904,54736</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1439667$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=16926416$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Yoshida, A.</creatorcontrib><creatorcontrib>Hirano, S.</creatorcontrib><creatorcontrib>Suzuki, H.</creatorcontrib><creatorcontrib>Hasuo, S.</creatorcontrib><creatorcontrib>Tanabe, K.</creatorcontrib><creatorcontrib>Ito, T.</creatorcontrib><creatorcontrib>Himi, T.</creatorcontrib><creatorcontrib>Takai, H.</creatorcontrib><title>Frequency multiply circuit for superconducting A/D converter</title><title>IEEE transactions on applied superconductivity</title><addtitle>TASC</addtitle><description>A new frequency multiply circuit generating a 20 GHz sampling clock from an external 5 GHz signal for a lowpass sigma-delta modulator was proposed and designed. The multiply circuit was composed of a ladder circuit, a modified Josephson transmission line (JTL) and T-flip flop (T-FF). We confirmed by numerical simulation that the period jitter of SFQ pulse trains generated by the ladder circuit could be reduced to a value small enough to realize 14-bit resolution for 10 MHz bandwidth by utilizing the repulsion effect between SFQ pulses in the modified JTL. The multiply circuit was fabricated by a 2.5 kA/cm/sup 2/ Nb process, and its correct operation was confirmed.</description><subject>Analog-to-digital converter</subject><subject>Applied sciences</subject><subject>Circuit properties</subject><subject>Circuits</subject><subject>Clocks</subject><subject>Delta-sigma modulation</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Digital circuits</subject><subject>Distributed parameter circuits</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Frequency conversion</subject><subject>frequency multiply circuit</subject><subject>Integrated circuits</subject><subject>Jitter</subject><subject>Josephson device</subject><subject>Ladders</subject><subject>Modulators</subject><subject>Numerical simulation</subject><subject>Pulse circuits</subject><subject>rapid single flux quantum circuit</subject><subject>Sampling</subject><subject>Sampling methods</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>sigma-delta modulator</subject><subject>Signal convertors</subject><subject>Signal design</subject><subject>Signal generators</subject><subject>Superconducting transmission lines</subject><subject>Superconductivity</subject><subject>Trains</subject><issn>1051-8223</issn><issn>1558-2515</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2005</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqNkU1Lw0AQhoMoqNW74CUIipe0M5vdZBe8lPoJBQ_W87LZTCQlTepuIvTfu6UFwYN4mhnmmZeZeaPoAmGMCGqymL7NxgxAjCVXMssPohMUQiZMoDgMOQhMJGPpcXTq_RIAueTiJLp7dPQ5UGs38Wpo-nrdbGJbOzvUfVx1LvbDmpzt2nKwfd1-xNPJfRzKL3I9ubPoqDKNp_N9HEXvjw-L2XMyf316mU3nieUo-kTyvJSVUNKKvDSCOBaCRMoqKJDnipSUxkKmlCxYWRhjuIISRKEyQjA5paPoZqe7dl1Y1vd6VXtLTWNa6gavmcSUK57-AwSWC8QA3v4JYpqFv4X_8YBe_UKX3eDacK9WyEACqCxAsIOs67x3VOm1q1fGbTSC3vqjt_7orT96508Yud7rGm9NUznT2tr_zGWKZRy30pc7riainzZPVRZUvgE8fZci</recordid><startdate>20050601</startdate><enddate>20050601</enddate><creator>Yoshida, A.</creator><creator>Hirano, S.</creator><creator>Suzuki, H.</creator><creator>Hasuo, S.</creator><creator>Tanabe, K.</creator><creator>Ito, T.</creator><creator>Himi, T.</creator><creator>Takai, H.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope><scope>H8D</scope></search><sort><creationdate>20050601</creationdate><title>Frequency multiply circuit for superconducting A/D converter</title><author>Yoshida, A. ; Hirano, S. ; Suzuki, H. ; Hasuo, S. ; Tanabe, K. ; Ito, T. ; Himi, T. ; Takai, H.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c415t-847d8f598c57da5e41b5e532f0b1479e988ac06998b2dbaaa490d05b96e10a7e3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2005</creationdate><topic>Analog-to-digital converter</topic><topic>Applied sciences</topic><topic>Circuit properties</topic><topic>Circuits</topic><topic>Clocks</topic><topic>Delta-sigma modulation</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Digital circuits</topic><topic>Distributed parameter circuits</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronic circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Frequency conversion</topic><topic>frequency multiply circuit</topic><topic>Integrated circuits</topic><topic>Jitter</topic><topic>Josephson device</topic><topic>Ladders</topic><topic>Modulators</topic><topic>Numerical simulation</topic><topic>Pulse circuits</topic><topic>rapid single flux quantum circuit</topic><topic>Sampling</topic><topic>Sampling methods</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>sigma-delta modulator</topic><topic>Signal convertors</topic><topic>Signal design</topic><topic>Signal generators</topic><topic>Superconducting transmission lines</topic><topic>Superconductivity</topic><topic>Trains</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Yoshida, A.</creatorcontrib><creatorcontrib>Hirano, S.</creatorcontrib><creatorcontrib>Suzuki, H.</creatorcontrib><creatorcontrib>Hasuo, S.</creatorcontrib><creatorcontrib>Tanabe, K.</creatorcontrib><creatorcontrib>Ito, T.</creatorcontrib><creatorcontrib>Himi, T.</creatorcontrib><creatorcontrib>Takai, H.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><collection>Aerospace Database</collection><jtitle>IEEE transactions on applied superconductivity</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yoshida, A.</au><au>Hirano, S.</au><au>Suzuki, H.</au><au>Hasuo, S.</au><au>Tanabe, K.</au><au>Ito, T.</au><au>Himi, T.</au><au>Takai, H.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Frequency multiply circuit for superconducting A/D converter</atitle><jtitle>IEEE transactions on applied superconductivity</jtitle><stitle>TASC</stitle><date>2005-06-01</date><risdate>2005</risdate><volume>15</volume><issue>2</issue><spage>431</spage><epage>434</epage><pages>431-434</pages><issn>1051-8223</issn><eissn>1558-2515</eissn><coden>ITASE9</coden><abstract>A new frequency multiply circuit generating a 20 GHz sampling clock from an external 5 GHz signal for a lowpass sigma-delta modulator was proposed and designed. The multiply circuit was composed of a ladder circuit, a modified Josephson transmission line (JTL) and T-flip flop (T-FF). We confirmed by numerical simulation that the period jitter of SFQ pulse trains generated by the ladder circuit could be reduced to a value small enough to realize 14-bit resolution for 10 MHz bandwidth by utilizing the repulsion effect between SFQ pulses in the modified JTL. The multiply circuit was fabricated by a 2.5 kA/cm/sup 2/ Nb process, and its correct operation was confirmed.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TASC.2005.849867</doi><tpages>4</tpages></addata></record> |
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| subjects | Analog-to-digital converter Applied sciences Circuit properties Circuits Clocks Delta-sigma modulation Design. Technologies. Operation analysis. Testing Digital circuits Distributed parameter circuits Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Frequency conversion frequency multiply circuit Integrated circuits Jitter Josephson device Ladders Modulators Numerical simulation Pulse circuits rapid single flux quantum circuit Sampling Sampling methods Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices sigma-delta modulator Signal convertors Signal design Signal generators Superconducting transmission lines Superconductivity Trains |
| title | Frequency multiply circuit for superconducting A/D converter |
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