Analyses and design of bias circuits tolerating output voltages above BVCEO
Due to the inevitable tradeoff between speed and breakdown voltage, the spectacular speed improvement of modern SiGe processes in recent history has partially been achieved at the cost of a reduction in breakdown voltages. Because supply voltages have hardly been reduced however, circuits operating...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 2005-10, Vol.40 (10), p.2008-2018 |
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| container_end_page | 2018 |
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| container_issue | 10 |
| container_start_page | 2008 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 40 |
| creator | VEENSTRA, Hugo HURKX, G. A. M VAN GOOR, Dave BREKELMANS, Hans LONG, John R |
| description | Due to the inevitable tradeoff between speed and breakdown voltage, the spectacular speed improvement of modern SiGe processes in recent history has partially been achieved at the cost of a reduction in breakdown voltages. Because supply voltages have hardly been reduced however, circuits operating at a supply voltage above the collector-emitter breakdown voltage (BVCEO) are common practice today and collector-base avalanche currents are therefore of major concern. |
| doi_str_mv | 10.1109/JSSC.2005.852829 |
| format | Article |
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| ispartof | IEEE journal of solid-state circuits, 2005-10, Vol.40 (10), p.2008-2018 |
| issn | 0018-9200 1558-173X |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Analog circuits Applied sciences Circuit properties Electric, optical and optoelectronic circuits Electronic circuits Electronic equipment and fabrication. Passive components, printed wiring boards, connectics Electronics Exact sciences and technology Integrated circuits Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Transistors |
| title | Analyses and design of bias circuits tolerating output voltages above BVCEO |
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