TD-SCDMA/HSDPA Transceiver and Analog Baseband Chipset in 0.18- [Formula Omitted] CMOS Process

A dual-band time-division synchronous code-division multiple access chipset supporting 2.8-Mb/s high-speed downlink packet access has been demonstrated in 0.18-[Formula Omitted] CMOS technology. The receiver adjacent channel selectivity requirement for the transceiver is relaxed by utilizing a high-...

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Veröffentlicht in:	IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2010-02, Vol.57 (2), p.90
Hauptverfasser:	Li, Zhenbiao, Li, Ming, Zhao, Dong, Ma, Dequn, Ni, Wenhai, Ouyang, Zhongming
Format:	Artikel
Sprache:	eng
Online-Zugang:	Volltext
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