An Efficient SER Estimation Method for Combinational Circuits

Nanometer CMOS VLSI circuits are highly sensitive to soft errors due to environmental causes such as cosmic radiation, and charged particles. These phenomena, also known as single-event upsets (SEU), induce current pulses at random times and random locations in a digital circuit. In this article, we present a new soft error rate (SER) estimation method for combinational circuits. This method is more efficient than other known methods because it takes into account only those physical factors which have a significant impact on the error rate. We first present an equation for SER irrespective of masking effects in combinational circuits. Then we describe the three masking effects, and augment the SER equation according to these effects. Finally, we present the results of our SER estimation method for several CMOS technologies.