1.8 V Power Supply 16 Mb-MRAMs With 42.3% Array Efficiency

Technologies for realizing high density MRAM were developed. First, new circuitry to lower the resistance of programming wires was developed. Second, both MTJ plane shape and cross-sectional structure were optimized to lower the programming current. Based on these two technologies, 16 Mb MRAM was de...

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Veröffentlicht in:	IEEE transactions on magnetics 2006-10, Vol.42 (10), p.2724-2726
Hauptverfasser:	Yoda, H., Kai, T., Inaba, T., Iwata, Y., Shimomura, N., Ikegawa, S., Tsuchida, K., Asao, Y., Kishi, T., Ueda, T., Takahashi, S., Nagamine, M., Kajiyama, T., Yoshikawa, M., Amano, M., Nagase, T., Hosotani, K., Nakayama, M., Shimizu, Y., Aikawa, H., Nishiyama, K., Kitagawa, E., Takizawa, R., Ueda, Y., Iwayama, M., Itagaki, K.
Format:	Artikel
Sprache:	eng
Schlagworte:	Arrays Circuit simulation CMOS CMOS technology Cross sections Cross-disciplinary physics: materials science rheology Exact sciences and technology Low voltage Magnetic tunnel junction (MTJ) Magnetic tunneling Magnetism Magnetoresistive random access memory magnetoresistive random access memory (MRAM) Materials science Other topics in materials science Physics Planes Power supplies Programming Random access memory Research and development Shape Switches Wire Wires
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Beschreibung
Zusammenfassung:	Technologies for realizing high density MRAM were developed. First, new circuitry to lower the resistance of programming wires was developed. Second, both MTJ plane shape and cross-sectional structure were optimized to lower the programming current. Based on these two technologies, 16 Mb MRAM was designed, fabricated with 130 nm CMOS process and 240 nm back end MTJ process. As a result, a 1.8 V power supply MRAM with 42.3% array efficiency was successfully demonstrated
ISSN:	0018-9464 1941-0069
DOI:	10.1109/TMAG.2006.880081