Promoting emitter diffusion process and optimization of vertical profiles for high-speed SiGe HBT/BiCMOS

A high-temperature anneal-resistant process, which enables high-speed SiGe HBTs to embed scaled CMOS, is optimized in SiGe BiCMOS technology. This process, called promoting emitter diffusion (PED), is based on enhanced phosphorous diffusion from poly-Si emitter electrodes at high temperature to fabricate thin base layers and shorten the base transit time. By investigating the dependence of high-frequency performance on diffusion temperature, as-grown base layer thickness, and Si cap thickness, the methodology for PED optimization was yielded. In addition, this PED process is effective in reducing an extrinsic base resistance due to deep boron diffusion from poly-Si base electrodes. This indicates that the PED process is very effective at improving the tradeoff relationship between cutoff frequency f/sub T/ and maximum oscillation frequency f/sub max/ in self-aligned SiGe HBTs using selective epitaxial growth. As a consequence, both f/sub T/ and f/sub max/ of more than 200GHz were successfully obtained.