An improved scaled DCT architecture

An improved scaled DCT architecture

This paper presents an efficient architecture for computing the eight-point 1D scaled DCT (discrete cosine transform) with a new algorithm based on a selected Loeffler DCT scheme whose multiplications are placed in the last stage. The proposed DCT architecture does not require any scaling compensati...

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Veröffentlicht in:IEEE transactions on consumer electronics 2009-05, Vol.55 (2), p.685-689
Hauptverfasser: Wu, Zhigang, Sha, Jin, Wang, Zhongfeng, Li, Li, Gao, Minglun
Format: Artikel
Sprache:eng
Schlagworte:
Algorithms
Approximation
Approximation algorithms
Approximation methods
Architecture
Computation
Computer architecture
CORDIC algorithm
DCT
Delay
Discrete cosine transforms
Electronics
Hardware
Iterative algorithms
Karhunen-Loeve transforms
Mathematical analysis
Multiplication
Quantization
Robustness
Scaled DCT
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Beschreibung
Zusammenfassung:This paper presents an efficient architecture for computing the eight-point 1D scaled DCT (discrete cosine transform) with a new algorithm based on a selected Loeffler DCT scheme whose multiplications are placed in the last stage. The proposed DCT architecture does not require any scaling compensation in the computation. Furthermore, a multiplication approximation method is developed, which is more efficient than traditional CORDIC (coordinate rotation digital computer)-based algorithms. Compared to the latest work (Sun et al., 2007), the proposed approach can save 14% addition operations for the same precision requirement and the path delay can be significantly reduced as well.
ISSN:0098-3063
1558-4127
DOI:10.1109/TCE.2009.5174440