High-Level Test Synthesis for Behavioral and Structural Designs
High-Level Test Synthesis (HLTS), a term introduced in recent years, promises automatic enhancement of testability of a circuit. In this paper we will show how HLTS can achieve higher testability for BIST-oriented test methodologies. Our results show considering testability during high-level synthes...
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Veröffentlicht in: | Journal of electronic testing 1998-10, Vol.13 (2), p.167 |
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Hauptverfasser: | , , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | High-Level Test Synthesis (HLTS), a term introduced in recent years, promises automatic enhancement of testability of a circuit. In this paper we will show how HLTS can achieve higher testability for BIST-oriented test methodologies. Our results show considering testability during high-level synthesis, better testability can be obtained when compared to DFT at low level. Transformation for testability, which allows behavioral modification for testability, is a very powerful HLTS technique.[PUBLICATION ABSTRACT] |
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ISSN: | 0923-8174 1573-0727 |
DOI: | 10.1023/A:1008309921888 |