Runtime analysis of novel carry increment adder with carry look-ahead adder using VHDL language

Runtime analysis of novel carry increment adder with carry look-ahead adder using VHDL language

A combination of features borrowed from Carry Look-Ahead adders (CLAs) and Novel Carry Increment adders (CIAs) improved the adder’s simplicity and performance. The size and speed of the high-speed adder were reduced by twenty samples. Both the Carry Look-Ahead adder (CLA) and the Novel Carry Increme...

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Bibliographische Detailangaben
Hauptverfasser: Mohithsaicharan, Karanam, Jagadeesh, P.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
High speed
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Beschreibung
Zusammenfassung:A combination of features borrowed from Carry Look-Ahead adders (CLAs) and Novel Carry Increment adders (CIAs) improved the adder’s simplicity and performance. The size and speed of the high-speed adder were reduced by twenty samples. Both the Carry Look-Ahead adder (CLA) and the Novel Carry Increment adder (CIA) utilise 10 samples, however the CIA is quicker and requires less space (p
ISSN:0094-243X
1551-7616
DOI:10.1063/5.0228191