A 5.5/12.5‐GHz concurrent dual‐band power amplifier MMIC in 0.25 μm GaAs technology

A concurrent 5.5/12.5‐GHz dual‐band power amplifier (PA) is designed and implemented in a 0.25 μm GaAs pseudomorphic high electron mobility transistor process. The PA is composed of two stages and adopts LC parallel and series networks for dual‐band matching. The efficiency of the PA is improved by lowering the drain voltage of the driver stage. Measurement results show that the proposed PA features the maximum small‐signal gain of 17.1 and 15.6 dB, the maximum output power of 24.9 and 24.5 dBm, and peak power‐added efficiency (PAE) of 35.5% and 35% at 5.5 and 12.5 GHz, respectively. The PA consumes a total DC of 73 mA, and its power consumption is 503 mW. The chip size of the PA is 1.4 × 1.3 mm2 including all testing pads.