A 100 GBd PAM-4 Combiner and Driver in SiGe BiCMOS
In this letter, we present an analog PAM-4 combiner and driver circuit based on a current steering output stage designed in a 130 nm SiGe BiCMOS technology. The circuit features an on-chip active balun with more than 67 GHz bandwidth. The output stage supports an adjustable PAM-4 level spacing. It c...
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Veröffentlicht in: | IEEE microwave and wireless technology letters (Print) 2023-09, Vol.33 (9), p.1-4 |
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Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | In this letter, we present an analog PAM-4 combiner and driver circuit based on a current steering output stage designed in a 130 nm SiGe BiCMOS technology. The circuit features an on-chip active balun with more than 67 GHz bandwidth. The output stage supports an adjustable PAM-4 level spacing. It consumes 315 mW and delivers 2 Vpp,diff in a 100 \Omega load. Operation of up to 100 GBd has been verified by measured eye diagrams. |
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ISSN: | 2771-957X 2771-9588 |
DOI: | 10.1109/LMWT.2023.3293040 |