Enhancing interfacial thermal transport by nanostructures: Monte Carlo simulations with ab initio phonon properties

Recent experiments have indicated that employing nanostructures can enhance interfacial heat transport, but the mechanism by which different structural morphologies and dimensions contribute to the full-spectrum phonon interfacial transport remains unclear. In this paper, a multiscale method to stud...

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Veröffentlicht in:arXiv.org 2024-06
Hauptverfasser: Luo, Wenzhu, Wang, Neng, Lian, Wenlei, Yin, Ershuai, Li, Qiang
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Sprache:eng
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Zusammenfassung:Recent experiments have indicated that employing nanostructures can enhance interfacial heat transport, but the mechanism by which different structural morphologies and dimensions contribute to the full-spectrum phonon interfacial transport remains unclear. In this paper, a multiscale method to study the thermal transfer at nanostructured interfaces is developed by combining density functional calculation, Monte Carlo simulation, and diffuse mismatch method. The changes in the transport paths and contributions to thermal conductance of different frequency phonons caused by changes in nanostructure morphology and size are investigated. The results show that, compared to the triangular and trapezoidal nanostructures, the rectangular nanostructures are more beneficial in enhancing the probability of the reflected phonons encountering the interface, and thus the phonon interfacial transmittance. The nanostructure makes the interfacial heat flow extremely heterogeneous, with significant transverse heat flow occurring at the sidewalls, resulting in a new thermal conduction pathway. The phenomena of multiple reflections and double transmission together lead to the existence of the optimal dimension that maximizes the nanostructures enhancement effect on interfacial heat transfer. The optimal nanostructure width is 100 nm when the height is 100 nm and the maximum interfacial thermal conductance enhancement ratio is 1.31. These results can guide the design of heat transfer enhancement structures at the interface of the actual high-power chips.
ISSN:2331-8422