Towards a universal and portable assembly code size reduction: a case study of RISC-V ISA
The increasing sizes of modern applications significantly hinder user acquisition and updates, particularly in computing environments constrained by memory and storage capacities. To address this challenge, our article presents a novel assembly code optimization framework aimed at reducing applicati...
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Veröffentlicht in: | CCF transactions on high performance computing (Online) 2024-06, Vol.6 (3), p.263-273 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | The increasing sizes of modern applications significantly hinder user acquisition and updates, particularly in computing environments constrained by memory and storage capacities. To address this challenge, our article presents a novel assembly code optimization framework aimed at reducing application size. Unlike traditional compiler-based optimizations that require intricate knowledge of compiler architectures and are tightly integrated within specific toolchains, our approach operates independently of compiling modules at the assembly code level, offering a universal solution applicable across various computing environments. This decoupled design allows for substantial code size reductions without sacrificing functionality or performance. By taking RISC-V ISA as a case study, the experimental results show that our approach can outperform the default optimization levels (e.g., ‘-Oz’ and ‘-O3’), with an improvement of up to 6% in code size reduction. Our findings present a practical and effective strategy for code size optimization, particularly beneficial for memory-constrained embedded systems and storage-sensitive mobile devices, thereby facilitating broader application accessibility and enhanced update processes. |
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ISSN: | 2524-4922 2524-4930 |
DOI: | 10.1007/s42514-024-00190-2 |