Impact of Process on Gate Leakage Current and Time-Dependent Dielectric Breakdown Failure Mechanisms of 4H-SiC MOS Capacitors
This article offers an analysis that includes both experimental and theoretical dimensions of silicon carbide (SiC)/SiO2 metal-oxide-semiconductor (MOS) capacitors. The study integrates first-principles calculations to clarify the physical failure mechanism associated with time-dependent dielectric...
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Veröffentlicht in: | IEEE transactions on electron devices 2024-07, Vol.71 (7), p.4039-4044 |
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Sprache: | eng |
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Zusammenfassung: | This article offers an analysis that includes both experimental and theoretical dimensions of silicon carbide (SiC)/SiO2 metal-oxide-semiconductor (MOS) capacitors. The study integrates first-principles calculations to clarify the physical failure mechanism associated with time-dependent dielectric breakdown (TDDB). Initially, by electrical characterizations of J- {V} _{g} curves and TDDB in the two different devices, elucidating the associated physical mechanisms underlying gate reliability issues at diverse gate voltage ( {V}_{\text {gs}} ) and temperatures, which was found that elevated temperature induces a reduction in the potential barrier height, resulting in a higher tunneling current. Furthermore, to reveal the failure mechanisms of TDDB, first principles were used. It is concluded that: 1) under constant voltage, with the extension of time, the SiO2 layer will capture more electrons, and, when it reaches a certain degree, a conductive path will be formed in the gate oxygen, causing breakdown and 2) as the gate voltage increases, the electron capture rate will significantly increase, leading to a rapid reduction of the breakdown time of the SiO2 gate oxide layer. |
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ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/TED.2024.3405473 |