Performance Evaluation of Nano-scale Core–Shell Junctionless FETs in the Designing of Ultralow-Power Inverter and Ring Oscillator

A core–shell junctionless field-effect transistor (CS-JLFET) has been utilized for designing ultra-low-power inverter and ring oscillator circuits. The core doping can be considered as similarly doped or oppositely doped (OD) shells. The presence of the core with the opposite impurity of the shells in the OD-CS-JLFET leads to depleting the volume, and, as a result, obtaining the optimal off-current ( I off ) and the ON-to-OFF current ratio ( I on / I off ). Achieving an acceptable off-current in the OD-CS-JLFET helped to improve the power consumption of the inverter and ring oscillator circuits. In addition, the CS technique can be regarded as a beneficial approach to adjust the threshold voltage. The simulation results reveal that the power consumption of the inverter based on OD-CS-JLFET is improved by 55% compared to a JLFET. Also, with the design of the three-stage ring oscillator based on the OD-CS-JLFET, the power consumption obtained acceptable values of 99.15 μ W .