SARIS: Accelerating Stencil Computations on Energy-Efficient RISC-V Compute Clusters with Indirect Stream Registers

Stencil codes are performance-critical in many compute-intensive applications, but suffer from significant address calculation and irregular memory access overheads. This work presents SARIS, a general and highly flexible methodology for stencil acceleration using register-mapped indirect streams. W...

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Veröffentlicht in:	arXiv.org 2024-04
Hauptverfasser:	Scheffler, Paul, Colagrande, Luca, Benini, Luca
Format:	Artikel
Sprache:	eng
Online-Zugang:	Volltext
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