A Low-Power 23-25.5-GHz FMCW Radar Transceiver in 65-nm CMOS for AIOT Applications

A low-power 23-25.5-GHz frequency-modulated continuous wave (FMCW) radar transceiver, implemented in 65-nm CMOS, is proposed for artificial intelligence-Internet of Things (AIOT) applications in this article. The transceiver integrates a frequency synthesizer, a power amplifier (PA), a low noise amplifier (LNA), I/Q mixers, a quadrature all-pass filter (QAF)-based local oscillator (LO) generator, and an analog baseband (ABB). A current-sharing LNA using g_m -boosting three-turn coupling transformers and an LO generator using injection locking technique are employed to render high gain with low power consumption. Furthermore, a Class-B mixer with bulk injection (BI) technique is proposed to alleviate LO signal strength requirement with low power while enhancing conversion gain (CG) and linearity. Measurements demonstrate that the transceiver demonstrates a peak transmitter (TX) output power of 12.6 dBm with 28.5% efficiency, a receiver (RX) CG of 54.2 dB, a minimum RX \text{NF}_{\text{dsb}} of 5.7 dB @ 1.6-MHz offset, an RX IIP3 of - 24 dBm and an RX IP1dB of - 34.5 dBm @42-dB gain across 23-25.5 GHz from a 1-V supply. To further reduce power consumption, the transceiver can work under a low supply voltage of 0.75 V and can still deliver a 9.1-dBm TX output power with 19.2% efficiency, a 49.6-dB RX CG, a 7.9-dB RX \text{NF}_{\text{dsb}} @1.6-MHz offset, a - 29.1-dBm RX IIP3, and a - 41.7-dBm RX IP1dB @ 42-dB gain across 23.2-24.8 GHz. The measured phase noise is - 102 dBc/Hz at 1-MHz offset at 23.4 GHz. The root-mean-square (rms) frequency error is 120 kHz (0.12%) for a sawtooth chirp with 100-MHz bandwidth and 1-MHz/s chirp-rate. With two external 20-dBi horn antennas, the radar demonstrates a 15.6-cm range resolution with 960-MHz modulation bandwidth in 20-m indoor tests. The entire transceiver occupies a chip area of 2.3 \times