Sub-5 nm bilayer GaSe MOSFETs towards ultrahigh on-state current

Dielectric engineering plays a crucial role in the process of device miniaturization. Herein we investigate the electrical properties of bilayer GaSe metal-oxide-semiconductor field-effect transistors (MOSFETs), considering hetero-gate-dielectric construction, dielectric materials and GaSe stacking pattern. The results show that device performance strongly depends on the dielectric constants and locations of insulators. When high- k dielectric is placed close to the drain, it behaves with a larger on-state current ( I on ) of 5052 µA/µm when the channel is 5 nm. Additionally, when the channel is 5 nm and insulator is HfO 2 , the largest I on is 5134 µA/µm for devices with AC stacking GaSe channel. In particular, when the gate length is 2 nm, it still meets the HP requirements of ITRS 2028 for the device with AA stacking when high- k dielectric is used. Hence, the work provides guidance to regulate the performance of the two-dimensional nanodevices by dielectric engineering.