Real-time hardware architecture of an ECG compression algorithm for IoT health care systems and its VLSI implementation

The Internet of Things (IoT) in the medical and biomedical field proposes new and efficient hardware for healthcare services. Thanks to machine-machine interaction and real-time solutions, the problems of accessibility and reliability are resolved. In addition, increased patient engagement in decision-making will drive health service compliance. Vital signals like the electrocardiogram (ECG) are some of the most critical biomedical information to process; it is the subject of several studies. The data flow of those signals is enormous, making real-time transmission a tough job, hence the need to compress these vital signals. Designing efficient hardware compression engines is a promising challenge for efficient real-time transmission. This article introduces a new VLSI (Very-Large-Scale Integration) architecture for an ECG compression engine based on the algorithm presented in the same work. The efficiency of our processor was verified using the MIT BIH databases. We have also implemented it using An FPGA, which reaches a frequency of 170 MHz and 65 n TCMS CMOS. The proposed processor uses 1.85 Kgates and consumes 25 nW with a compression ratio of 3.42.