Multilevel and Low-Power Resistive Switching Based on pn Heterojunction Memory

In this work, unipolar resistive switching (RS) is demonstrated in a Ni/p-NiO/n + -Si heterojunction device based on the formation/rupture of conducting filaments (CFs). The potential barrier of the pn heterostructure can effectively increase the device initial resistance, with the benefit of low power and multilevel RS under proper compliance currents (CCs). In addition, this difference in CF size occurs between the dielectric layer and depletion region due to the existence of a built-in electric field. As a result, the RS is localized in the p-NiO/n + -Si depletion region, increasing the degree of localization and decreasing resistance fluctuation. This work will provide a feasible approach for low-power nonvolatile multi-bit memory applications in the future.