FPGA Implementation of a Chaotic Pseudo-random Numbers Generator

The exploitation of chaotic systems in the secure transmissions has become more investigated in the last years due to their random aspects, such as ergodicity and high sensitivity to variations. These characteristics have led to the emergence of new generation of secure transmissions based on the use of chaotic systems as pseudo-random numbers generators. The study in this paper is centered around this concept, where we have pointed the potential of chaotic maps exploitation in the pseudo-random numbers generation. More precisely, we opted for a hardware implementation of a chaotic pseudo-random numbers generator (CPRNG) using a field programmable gate array (FPGA) of type Xilinx Spartan-XC6LX16. A perturbation technique has been applied to improve the randomness effect of the proposed CPRNG under finite precision implementation. As a result, the achieved performance and the low interception probability of the bit streams produced by our CPRNG make them suitable for application in the field of cryptography, especially in the design of stream ciphers where standards are lacking.