Improved DC Performances of Gate-all-around Si-Nanotube Tunnel FETs Using Gate-Source Overlap
In this work, a novel structure of Gate-all-Around Si-Nanotube Tunnel FET (GAA Si-NTTFET) has been proposed to improve its electrical characteristics by overlapping a portion of source with its gate terminal. Using 3-D TCAD simulation, it has been found that the on-state current and subthreshold swi...
Gespeichert in:
| Veröffentlicht in: | SILICON 2022-02, Vol.14 (4), p.1463-1470 |
|---|---|
| Hauptverfasser: | , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 1470 |
|---|---|
| container_issue | 4 |
| container_start_page | 1463 |
| container_title | SILICON |
| container_volume | 14 |
| creator | Singh, Avtar Pandey, Chandan Kumar |
| description | In this work, a novel structure of Gate-all-Around Si-Nanotube Tunnel FET (GAA Si-NTTFET) has been proposed to improve its electrical characteristics by overlapping a portion of source with its gate terminal. Using 3-D TCAD simulation, it has been found that the on-state current and subthreshold swing of GAA Si-NTTFET can be significantly improved with an optimum length of gate-source overlapping (GSO) i.e. 27-nm only, thus not limiting the scalability of source region. Furthermore, GSO has also caused a reduction in the turn-on voltage of GAA Si-NTTFET which may help to scaling the supply voltages. Moreover, due to reduction in the lateral electric field at source-channel interface caused by GSO, the off-state current has been observed to be smaller as compared to the conventional GAA Si-NTTFET which eventually reduces the stand-by power dissipation. Additionally, the ambipolar current has also been found to be reduced in the proposed structure which makes it more suitable for its application in the digital circuits. |
| doi_str_mv | 10.1007/s12633-021-00957-0 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_2919988478</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2919988478</sourcerecordid><originalsourceid>FETCH-LOGICAL-c319t-9c8448ea640ed2b265006fc7d7faec9114c80d59f0d10b888dafaf3b9561cedb3</originalsourceid><addsrcrecordid>eNp9kE1LAzEQhoMoWGr_gKeA5-hkP5Oj1K9CsUJb8CIhm52Ulm22JrsF_73RFb05l5nD874z8xJyyeGaA5Q3gSdFmjJIOAOQecnghIy4KAsmJRenvzO8npNJCDuIlSalKOSIvM32B98esaZ3U_qC3rZ-r53BQFtLH3WHTDcN077tXU2XW_asXdv1FdJV7xw29OF-Feg6bN1moJdt7w3SxRF9ow8X5MzqJuDkp4_JOgqmT2y-eJxNb-fMpFx2TBqRZQJ1kQHWSZUUOUBhTVmXVqORnGdGQJ1LCzWHSghRa6ttWsm84AbrKh2Tq8E3_vLeY-jULt7h4kqVSC6lEFkpIpUMlPFtCB6tOvjtXvsPxUF9JamGJFVMUn0nqSCK0kEUIuw26P-s_1F9Ai4Hdfk</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2919988478</pqid></control><display><type>article</type><title>Improved DC Performances of Gate-all-around Si-Nanotube Tunnel FETs Using Gate-Source Overlap</title><source>SpringerLink Journals</source><source>ProQuest Central</source><creator>Singh, Avtar ; Pandey, Chandan Kumar</creator><creatorcontrib>Singh, Avtar ; Pandey, Chandan Kumar</creatorcontrib><description>In this work, a novel structure of Gate-all-Around Si-Nanotube Tunnel FET (GAA Si-NTTFET) has been proposed to improve its electrical characteristics by overlapping a portion of source with its gate terminal. Using 3-D TCAD simulation, it has been found that the on-state current and subthreshold swing of GAA Si-NTTFET can be significantly improved with an optimum length of gate-source overlapping (GSO) i.e. 27-nm only, thus not limiting the scalability of source region. Furthermore, GSO has also caused a reduction in the turn-on voltage of GAA Si-NTTFET which may help to scaling the supply voltages. Moreover, due to reduction in the lateral electric field at source-channel interface caused by GSO, the off-state current has been observed to be smaller as compared to the conventional GAA Si-NTTFET which eventually reduces the stand-by power dissipation. Additionally, the ambipolar current has also been found to be reduced in the proposed structure which makes it more suitable for its application in the digital circuits.</description><identifier>ISSN: 1876-990X</identifier><identifier>EISSN: 1876-9918</identifier><identifier>DOI: 10.1007/s12633-021-00957-0</identifier><language>eng</language><publisher>Dordrecht: Springer Netherlands</publisher><subject>Chemistry ; Chemistry and Materials Science ; Digital electronics ; Electric fields ; Electrons ; Energy dissipation ; Environmental Chemistry ; Inorganic Chemistry ; Lasers ; Materials Science ; Nanotubes ; Optical Devices ; Optics ; Original Paper ; Photonics ; Polymer Sciences ; Reduction ; Silicon ; Simulation ; Transistors ; Tunnels</subject><ispartof>SILICON, 2022-02, Vol.14 (4), p.1463-1470</ispartof><rights>Springer Nature B.V. 2021</rights><rights>Springer Nature B.V. 2021.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c319t-9c8448ea640ed2b265006fc7d7faec9114c80d59f0d10b888dafaf3b9561cedb3</citedby><cites>FETCH-LOGICAL-c319t-9c8448ea640ed2b265006fc7d7faec9114c80d59f0d10b888dafaf3b9561cedb3</cites><orcidid>0000-0002-4175-7646</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/s12633-021-00957-0$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://www.proquest.com/docview/2919988478?pq-origsite=primo$$EHTML$$P50$$Gproquest$$H</linktohtml><link.rule.ids>314,776,780,21367,27901,27902,33721,41464,42533,43781,51294</link.rule.ids></links><search><creatorcontrib>Singh, Avtar</creatorcontrib><creatorcontrib>Pandey, Chandan Kumar</creatorcontrib><title>Improved DC Performances of Gate-all-around Si-Nanotube Tunnel FETs Using Gate-Source Overlap</title><title>SILICON</title><addtitle>Silicon</addtitle><description>In this work, a novel structure of Gate-all-Around Si-Nanotube Tunnel FET (GAA Si-NTTFET) has been proposed to improve its electrical characteristics by overlapping a portion of source with its gate terminal. Using 3-D TCAD simulation, it has been found that the on-state current and subthreshold swing of GAA Si-NTTFET can be significantly improved with an optimum length of gate-source overlapping (GSO) i.e. 27-nm only, thus not limiting the scalability of source region. Furthermore, GSO has also caused a reduction in the turn-on voltage of GAA Si-NTTFET which may help to scaling the supply voltages. Moreover, due to reduction in the lateral electric field at source-channel interface caused by GSO, the off-state current has been observed to be smaller as compared to the conventional GAA Si-NTTFET which eventually reduces the stand-by power dissipation. Additionally, the ambipolar current has also been found to be reduced in the proposed structure which makes it more suitable for its application in the digital circuits.</description><subject>Chemistry</subject><subject>Chemistry and Materials Science</subject><subject>Digital electronics</subject><subject>Electric fields</subject><subject>Electrons</subject><subject>Energy dissipation</subject><subject>Environmental Chemistry</subject><subject>Inorganic Chemistry</subject><subject>Lasers</subject><subject>Materials Science</subject><subject>Nanotubes</subject><subject>Optical Devices</subject><subject>Optics</subject><subject>Original Paper</subject><subject>Photonics</subject><subject>Polymer Sciences</subject><subject>Reduction</subject><subject>Silicon</subject><subject>Simulation</subject><subject>Transistors</subject><subject>Tunnels</subject><issn>1876-990X</issn><issn>1876-9918</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2022</creationdate><recordtype>article</recordtype><sourceid>BENPR</sourceid><recordid>eNp9kE1LAzEQhoMoWGr_gKeA5-hkP5Oj1K9CsUJb8CIhm52Ulm22JrsF_73RFb05l5nD874z8xJyyeGaA5Q3gSdFmjJIOAOQecnghIy4KAsmJRenvzO8npNJCDuIlSalKOSIvM32B98esaZ3U_qC3rZ-r53BQFtLH3WHTDcN077tXU2XW_asXdv1FdJV7xw29OF-Feg6bN1moJdt7w3SxRF9ow8X5MzqJuDkp4_JOgqmT2y-eJxNb-fMpFx2TBqRZQJ1kQHWSZUUOUBhTVmXVqORnGdGQJ1LCzWHSghRa6ttWsm84AbrKh2Tq8E3_vLeY-jULt7h4kqVSC6lEFkpIpUMlPFtCB6tOvjtXvsPxUF9JamGJFVMUn0nqSCK0kEUIuw26P-s_1F9Ai4Hdfk</recordid><startdate>20220201</startdate><enddate>20220201</enddate><creator>Singh, Avtar</creator><creator>Pandey, Chandan Kumar</creator><general>Springer Netherlands</general><general>Springer Nature B.V</general><scope>AAYXX</scope><scope>CITATION</scope><scope>8FE</scope><scope>8FG</scope><scope>ABJCF</scope><scope>AFKRA</scope><scope>BENPR</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>D1I</scope><scope>DWQXO</scope><scope>HCIFZ</scope><scope>KB.</scope><scope>PDBOC</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><orcidid>https://orcid.org/0000-0002-4175-7646</orcidid></search><sort><creationdate>20220201</creationdate><title>Improved DC Performances of Gate-all-around Si-Nanotube Tunnel FETs Using Gate-Source Overlap</title><author>Singh, Avtar ; Pandey, Chandan Kumar</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c319t-9c8448ea640ed2b265006fc7d7faec9114c80d59f0d10b888dafaf3b9561cedb3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2022</creationdate><topic>Chemistry</topic><topic>Chemistry and Materials Science</topic><topic>Digital electronics</topic><topic>Electric fields</topic><topic>Electrons</topic><topic>Energy dissipation</topic><topic>Environmental Chemistry</topic><topic>Inorganic Chemistry</topic><topic>Lasers</topic><topic>Materials Science</topic><topic>Nanotubes</topic><topic>Optical Devices</topic><topic>Optics</topic><topic>Original Paper</topic><topic>Photonics</topic><topic>Polymer Sciences</topic><topic>Reduction</topic><topic>Silicon</topic><topic>Simulation</topic><topic>Transistors</topic><topic>Tunnels</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Singh, Avtar</creatorcontrib><creatorcontrib>Pandey, Chandan Kumar</creatorcontrib><collection>CrossRef</collection><collection>ProQuest SciTech Collection</collection><collection>ProQuest Technology Collection</collection><collection>Materials Science & Engineering Collection</collection><collection>ProQuest Central UK/Ireland</collection><collection>ProQuest Central</collection><collection>Technology Collection</collection><collection>ProQuest One Community College</collection><collection>ProQuest Materials Science Collection</collection><collection>ProQuest Central Korea</collection><collection>SciTech Premium Collection</collection><collection>Materials Science Database</collection><collection>Materials Science Collection</collection><collection>ProQuest One Academic Eastern Edition (DO NOT USE)</collection><collection>ProQuest One Academic</collection><collection>ProQuest One Academic UKI Edition</collection><jtitle>SILICON</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Singh, Avtar</au><au>Pandey, Chandan Kumar</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Improved DC Performances of Gate-all-around Si-Nanotube Tunnel FETs Using Gate-Source Overlap</atitle><jtitle>SILICON</jtitle><stitle>Silicon</stitle><date>2022-02-01</date><risdate>2022</risdate><volume>14</volume><issue>4</issue><spage>1463</spage><epage>1470</epage><pages>1463-1470</pages><issn>1876-990X</issn><eissn>1876-9918</eissn><abstract>In this work, a novel structure of Gate-all-Around Si-Nanotube Tunnel FET (GAA Si-NTTFET) has been proposed to improve its electrical characteristics by overlapping a portion of source with its gate terminal. Using 3-D TCAD simulation, it has been found that the on-state current and subthreshold swing of GAA Si-NTTFET can be significantly improved with an optimum length of gate-source overlapping (GSO) i.e. 27-nm only, thus not limiting the scalability of source region. Furthermore, GSO has also caused a reduction in the turn-on voltage of GAA Si-NTTFET which may help to scaling the supply voltages. Moreover, due to reduction in the lateral electric field at source-channel interface caused by GSO, the off-state current has been observed to be smaller as compared to the conventional GAA Si-NTTFET which eventually reduces the stand-by power dissipation. Additionally, the ambipolar current has also been found to be reduced in the proposed structure which makes it more suitable for its application in the digital circuits.</abstract><cop>Dordrecht</cop><pub>Springer Netherlands</pub><doi>10.1007/s12633-021-00957-0</doi><tpages>8</tpages><orcidid>https://orcid.org/0000-0002-4175-7646</orcidid></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 1876-990X |
| ispartof | SILICON, 2022-02, Vol.14 (4), p.1463-1470 |
| issn | 1876-990X 1876-9918 |
| language | eng |
| recordid | cdi_proquest_journals_2919988478 |
| source | SpringerLink Journals; ProQuest Central |
| subjects | Chemistry Chemistry and Materials Science Digital electronics Electric fields Electrons Energy dissipation Environmental Chemistry Inorganic Chemistry Lasers Materials Science Nanotubes Optical Devices Optics Original Paper Photonics Polymer Sciences Reduction Silicon Simulation Transistors Tunnels |
| title | Improved DC Performances of Gate-all-around Si-Nanotube Tunnel FETs Using Gate-Source Overlap |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T00%3A22%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Improved%20DC%20Performances%20of%20Gate-all-around%20Si-Nanotube%20Tunnel%20FETs%20Using%20Gate-Source%20Overlap&rft.jtitle=SILICON&rft.au=Singh,%20Avtar&rft.date=2022-02-01&rft.volume=14&rft.issue=4&rft.spage=1463&rft.epage=1470&rft.pages=1463-1470&rft.issn=1876-990X&rft.eissn=1876-9918&rft_id=info:doi/10.1007/s12633-021-00957-0&rft_dat=%3Cproquest_cross%3E2919988478%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2919988478&rft_id=info:pmid/&rfr_iscdi=true |