Fault-tolerant design of shift register using multilayer crossover in QCA

Field coupled logic has been proven itself as a revolutionary computing paradigm where the information propagates at higher frequency. This seems to be a promising way for physical implementation of Quantum Dot Cellular Automata (QCA) for low-power digital circuits. This paper presents a 4-bit shift register design using multilayer crossovers with optimized area, cells, delay and cost function as compared to the existing work in the domain. The development cycle involves designing a level-triggered D-flip flop as a fundamental element for construction of a shift register. The working of proposed design has been verified by simulating in QCA designer 2.0.3, and QCA designer-E has been utilized to measure power dissipation. Fault analysis has also been carried out to compute tolerance limits against various kinds of defects occurring during the deposition phase of physical implementation in QCA-based circuits.