A Novel Self-Aligned Dopingless Symmetric Tunnel Field Effect Transistor (DL-STFET): A Process Variations Tolerant Design

This work reports a novel device structure, dopingless heterojunction symmetric tunnel field effect transistor (DL-STFET), based on the work-function engineering. For realizing dopingless P + -N − -P + structure a metal with workfunction as 4.7 eV is deployed as source as well as drain electrode. This metal results in induced P + germanium regions for the source and drain implementation. The symmetric structure of the device obviates the inherent technical drawbacks of asymmetric P + -I-N + TFET structure that does not support bidirectional current flow and results in area penalty in layout design. As our device structure offers bidirectional current flow across germanium source, silicon channel, and germanium drain region. This in turn makes logic designing easier and it guarantees its integration with conventional CMOS technology. To improvise the device switching behaviour silicon pad is also employed below source and drain regions. Here, using exhaustive calibrated 2D TCAD simulation analysis demonstrates sub-threshold slope (SS) approximately as 59 mV/decade. Further, as the device structure does not require physical doping it is expected to exhibit immunity towards random dopant fluctuation (RDFs) and trap assisted tunnelling (TAT). Moreover, easy fabrication flow for DL-STFET because of the absence of doping and ion implantation/annealing cuts the thermal budget for the fabrication of the device as well. This device can be a strong candidate for ultra-low power integrated circuits with 0.5 V supply voltage.