Experimental investigation of the gate voltage range of negative differential capacitance in ferroelectric transistors

Conclusion In this study, the impacts of sweeping rate and device parameters on the gate voltage range of the NDC phenomenon are investigated based on experiments. With the increase of the frequency and dielectric capacitance, the beginning gate voltage of the NC emergence will increase, and the gat...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:Science China. Information sciences 2022-06, Vol.65 (6), p.169402, Article 169402
Hauptverfasser: Yang, Mengxuan, Huang, Qianqian, Su, Chang, Chen, Liang, Wang, Yangyuan, Huang, Ru
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Conclusion In this study, the impacts of sweeping rate and device parameters on the gate voltage range of the NDC phenomenon are investigated based on experiments. With the increase of the frequency and dielectric capacitance, the beginning gate voltage of the NC emergence will increase, and the gate duration voltage range and the maximum gate voltage amplification factor appear to increase first and then decrease. This work suggests a big challenge for scaled NCFETs to operate at high frequency with low V DD .
ISSN:1674-733X
1869-1919
DOI:10.1007/s11432-021-3268-0