Device simulation of GeSe homojunction and vdW GeSe/GeTe heterojunction TFETs for high-performance application

Compared with a two-dimensional (2D) homogeneous channel, the introduction of a 2D/2D homojunction or heterojunction is a promising method to improve the performance of a tunnel field-effect transistor (TFET), mainly by controlling the tunneling barrier. We simulate 10-nm- L g double-gated GeSe homo...

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Veröffentlicht in:Journal of computational electronics 2022-04, Vol.21 (2), p.401-410
Hauptverfasser: Wang, Qida, Xu, Peipei, Li, Hong, Liu, Fengbin, Sun, Shuai, Zhou, Gang, Qing, Tao, Zhang, Shaohua, Lu, Jing
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Sprache:eng
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Zusammenfassung:Compared with a two-dimensional (2D) homogeneous channel, the introduction of a 2D/2D homojunction or heterojunction is a promising method to improve the performance of a tunnel field-effect transistor (TFET), mainly by controlling the tunneling barrier. We simulate 10-nm- L g double-gated GeSe homojunction TFETs and van der Waals (vdW) GeSe/GeTe heterojunction TFETs based on a ballistic quasi-static ab initio quantum transport simulation. Two device configurations are considered for both the homojunction and heterojunction TFETs by placing the bilayer (BL) GeSe or vdW GeSe/GeTe heterojunction as the source or drain, while the channel and the remaining drain or source use monolayer (ML) GeSe. The on-state current ( I on ) values of the optimal n -type BL GeSe source homojunction TFET and the optimal p -type vdW GeSe/GeTe drain heterojunction TFET are 2320 and 2387 μA μm −1 , respectively, which are 50% and 64% larger than I on of the ML GeSe homogeneous TFET. Notably, the device performance ( I on , intrinsic delay time τ, and power dissipation PDP) of both the optimal n -type GeSe homojunction and p -type vdW GeSe/GeTe heterojunction TFETs meets the requirements of the International Roadmap for Devices and Systems for high-performance devices for the year 2034 (2020 version). Graphical abstract
ISSN:1569-8025
1572-8137
DOI:10.1007/s10825-022-01867-z