Evaluating the power consumption of the mixed style multiplier in compared with sequential multiplier
The primary goal of this work is to build a novel sequential multiplier and mixed type multiplier to examine power consumption. Material and Methods:The ISE Design suite was used to simulate and verify the multiplier’s design. The power values were acquired by altering the input values of a circuit....
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| creator | Kumar, S. Pradeep Dass, P. |
| description | The primary goal of this work is to build a novel sequential multiplier and mixed type multiplier to examine power consumption. Material and Methods:The ISE Design suite was used to simulate and verify the multiplier’s design. The power values were acquired by altering the input values of a circuit. In this experiment, 20 distinct values are used. For the analysis of the power used by the multiplier with a g power of 80%, 20 samples from each group were collected. Result:Compared to the minimum power consumption of sequential multipliers, which is 37.9226 mW, mixed style multipliers consume 21.969 mW. The significance value of two groups is (p < 0.05). Conclusion: From the analysis it was observed that a mixed style multiplier is significantly better than the sequential multiplier in the ISE design suite VLSI. |
| doi_str_mv | 10.1063/5.0172999 |
| format | Conference Proceeding |
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Pradeep ; Dass, P.</creator><contributor>Srinivasan, R. ; Balasubramanian, PL ; Jeganathan, M. ; Sathish, T. ; Babu, A.B. Karthick Anand ; Vijayan, V.</contributor><creatorcontrib>Kumar, S. Pradeep ; Dass, P. ; Srinivasan, R. ; Balasubramanian, PL ; Jeganathan, M. ; Sathish, T. ; Babu, A.B. Karthick Anand ; Vijayan, V.</creatorcontrib><description>The primary goal of this work is to build a novel sequential multiplier and mixed type multiplier to examine power consumption. Material and Methods:The ISE Design suite was used to simulate and verify the multiplier’s design. The power values were acquired by altering the input values of a circuit. In this experiment, 20 distinct values are used. For the analysis of the power used by the multiplier with a g power of 80%, 20 samples from each group were collected. Result:Compared to the minimum power consumption of sequential multipliers, which is 37.9226 mW, mixed style multipliers consume 21.969 mW. The significance value of two groups is (p < 0.05). Conclusion: From the analysis it was observed that a mixed style multiplier is significantly better than the sequential multiplier in the ISE design suite VLSI.</description><identifier>ISSN: 0094-243X</identifier><identifier>EISSN: 1551-7616</identifier><identifier>DOI: 10.1063/5.0172999</identifier><identifier>CODEN: APCPCS</identifier><language>eng</language><publisher>Melville: American Institute of Physics</publisher><subject>Circuits ; Multipliers ; Power consumption</subject><ispartof>AIP Conference Proceedings, 2023, Vol.2822 (1)</ispartof><rights>Author(s)</rights><rights>2023 Author(s). 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Pradeep</creatorcontrib><creatorcontrib>Dass, P.</creatorcontrib><title>Evaluating the power consumption of the mixed style multiplier in compared with sequential multiplier</title><title>AIP Conference Proceedings</title><description>The primary goal of this work is to build a novel sequential multiplier and mixed type multiplier to examine power consumption. Material and Methods:The ISE Design suite was used to simulate and verify the multiplier’s design. The power values were acquired by altering the input values of a circuit. In this experiment, 20 distinct values are used. For the analysis of the power used by the multiplier with a g power of 80%, 20 samples from each group were collected. Result:Compared to the minimum power consumption of sequential multipliers, which is 37.9226 mW, mixed style multipliers consume 21.969 mW. The significance value of two groups is (p < 0.05). Conclusion: From the analysis it was observed that a mixed style multiplier is significantly better than the sequential multiplier in the ISE design suite VLSI.</description><subject>Circuits</subject><subject>Multipliers</subject><subject>Power consumption</subject><issn>0094-243X</issn><issn>1551-7616</issn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2023</creationdate><recordtype>conference_proceeding</recordtype><recordid>eNpNkD9PwzAQxS0EEqUw8A0isSGl-Ow4dkZUlYJUiaUDm-UkNnWVPyZ2KP32OLQD0530fnf37iF0D3gBOKdPbIGBk6IoLtAMGIOU55BfohnGRZaSjH5coxvv9xiTgnMxQ3r1rZpRBdt9JmGnE9cf9JBUfefH1gXbd0lv_oTW_ug68eHYxH5sgnWNjaTtItw6NUTxYMMu8fpr1F2wqvmH3aIroxqv7851jrYvq-3yNd28r9-Wz5vUAaUhZYLrWoAAbSpeguC1YYqWODoVlQGiap5FoRSZ0XVeMY5LgxWoqjRxANM5ejitdUMfXfgg9_04dPGiJEIUPCMET9TjifKVDWr6UbrBtmo4SsBySlEyeU6R_gL3GWdC</recordid><startdate>20231114</startdate><enddate>20231114</enddate><creator>Kumar, S. Pradeep</creator><creator>Dass, P.</creator><general>American Institute of Physics</general><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope></search><sort><creationdate>20231114</creationdate><title>Evaluating the power consumption of the mixed style multiplier in compared with sequential multiplier</title><author>Kumar, S. Pradeep ; Dass, P.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-p133t-587ed8181efc7b187df5a3b07788cf12ad74c7bb84fed6c570bf0a1acbffc703</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Circuits</topic><topic>Multipliers</topic><topic>Power consumption</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Kumar, S. Pradeep</creatorcontrib><creatorcontrib>Dass, P.</creatorcontrib><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Kumar, S. Pradeep</au><au>Dass, P.</au><au>Srinivasan, R.</au><au>Balasubramanian, PL</au><au>Jeganathan, M.</au><au>Sathish, T.</au><au>Babu, A.B. Karthick Anand</au><au>Vijayan, V.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Evaluating the power consumption of the mixed style multiplier in compared with sequential multiplier</atitle><btitle>AIP Conference Proceedings</btitle><date>2023-11-14</date><risdate>2023</risdate><volume>2822</volume><issue>1</issue><issn>0094-243X</issn><eissn>1551-7616</eissn><coden>APCPCS</coden><abstract>The primary goal of this work is to build a novel sequential multiplier and mixed type multiplier to examine power consumption. Material and Methods:The ISE Design suite was used to simulate and verify the multiplier’s design. The power values were acquired by altering the input values of a circuit. In this experiment, 20 distinct values are used. For the analysis of the power used by the multiplier with a g power of 80%, 20 samples from each group were collected. Result:Compared to the minimum power consumption of sequential multipliers, which is 37.9226 mW, mixed style multipliers consume 21.969 mW. The significance value of two groups is (p < 0.05). Conclusion: From the analysis it was observed that a mixed style multiplier is significantly better than the sequential multiplier in the ISE design suite VLSI.</abstract><cop>Melville</cop><pub>American Institute of Physics</pub><doi>10.1063/5.0172999</doi><tpages>9</tpages></addata></record> |
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| source | AIP Journals Complete |
| subjects | Circuits Multipliers Power consumption |
| title | Evaluating the power consumption of the mixed style multiplier in compared with sequential multiplier |
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