Evaluating the power consumption of the mixed style multiplier in compared with sequential multiplier

The primary goal of this work is to build a novel sequential multiplier and mixed type multiplier to examine power consumption. Material and Methods:The ISE Design suite was used to simulate and verify the multiplier’s design. The power values were acquired by altering the input values of a circuit....

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Kumar, S. Pradeep, Dass, P.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The primary goal of this work is to build a novel sequential multiplier and mixed type multiplier to examine power consumption. Material and Methods:The ISE Design suite was used to simulate and verify the multiplier’s design. The power values were acquired by altering the input values of a circuit. In this experiment, 20 distinct values are used. For the analysis of the power used by the multiplier with a g power of 80%, 20 samples from each group were collected. Result:Compared to the minimum power consumption of sequential multipliers, which is 37.9226 mW, mixed style multipliers consume 21.969 mW. The significance value of two groups is (p < 0.05). Conclusion: From the analysis it was observed that a mixed style multiplier is significantly better than the sequential multiplier in the ISE design suite VLSI.
ISSN:0094-243X
1551-7616
DOI:10.1063/5.0172999