Synchronous Reluctance Motor Performance Improvement Using a Seven-Level and Nine-Level Inverter Topologies

Recently, synchronous reluctance motors have had a resurgence of benefit for many applications in the industry because of their simple framework, high effectiveness, low manufacturing cost, and high robustness. This research presents two inverter neutral-point-clamped topologies to improve the vector-controlled SynRM; these topologies offer interesting characteristics compared to the conventional structure-based two-level inverter. To get an inverter smooth switch command sequence, pulse width modulation has been modified to be adapted to the new topologies. The goal is to produce an output voltage vector which approaches the reference voltage vector as closely as possible. As a result, and contrary to the two-level inverter, that can only supply eight voltage vectors, the seven-level inverter can produce one 127 voltage vectors, and the nine-level inverter can produce 255 voltage vectors. Besides, an anti-windup structure is used in the speed loop regulation to ensure robust control with less static error. A comparison is done between the proposed techniques-based multilevel inverters and the conventional technique-based two-level inverter. Satisfactory results have been got by numerical simulation using MATLAB/Simulink .