Efficient hardware implementations of Lopez–Dahab projective co-ordinate based scalar multiplication of ECC

Elliptic curve cryptography (ECC) is most widely used asymmetric cryptography technique used in the modern engineering applications. This article proposes efficient hardware implementations scalar multiplication of Lopez–Dahab projective co-ordinate based ECC in the platforms of application specific integrated circuit (ASIC) and field programmable gate array logic (FPGA). The configurable G F ( 2 163 ) arithmetic unit is used to design the proposed scalar multiplication in ASIC platform with 45 nm CMOS technology. The scalar multiplication includes point addition and doubling. Since the G F ( 2 163 ) operations such as addition, multiplication, fused multiply addition (FMA), and multiplicative inverse required in the point addition and doubling are performed using the configurable G F ( 2 163 ) arithmetic unit, area and power dissipation of the proposed scalar multiplication in the ASIC platform is less than various existing designs. Similarly, both the Cortex-A9 cores of Zynq 7000 system on chip (SoC) are used to perform the two scalar multiplications in parallel, where the first core performs the point addition of the scalar multiplication while the second core performs the point doubling. Here, both the cores control separate co-processors to perform the point addition or doubling. Due to this dual core implementation in FPGA, the throughput of the proposed scalar multiplication in FPGA is greater than various existing designs.