Multilevel Fixed-Outline Component Placement and Graph-Based Ball Assignment for System in Package
Due to better performance and lower manufacturing cost, system in package (SiP) has attracted more attention in recent years. Fixed-outline component placement and ball assignment are the most important stages for an SiP design; however, they are still manually performed by experienced engineers now...
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Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2023-09, Vol.31 (9), p.1-12 |
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Sprache: | eng |
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Zusammenfassung: | Due to better performance and lower manufacturing cost, system in package (SiP) has attracted more attention in recent years. Fixed-outline component placement and ball assignment are the most important stages for an SiP design; however, they are still manually performed by experienced engineers nowadays. To speed up runtime and get better quality, this article proposes an efficient and effective two-stage approach to handle them. Our multilevel placement algorithm explores possible distributions of components over a placement region by the branch-and-bound (B&B) partitioning algorithm before they are legalized by the simulated annealing (SA) algorithm. Unlike previous methods which can only handle a limited number of components, our approach can easily get a feasible solution in a fixed-outline for several hundred components. In addition, we propose an iterative approach to assign external nets to solder balls by the graph-based algorithm. To further reduce wirelength and net crossing, a pair-exchange procedure is used to swap used balls with unused balls. The experimental results show that our placement algorithm can get shorter wirelength than IMF and other SA-based algorithm. Moreover, a net crossing number can be greatly reduced by our graph-based ball assignment algorithm than the integer linear programming approach with a little more wirelength. |
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ISSN: | 1063-8210 1557-9999 |
DOI: | 10.1109/TVLSI.2023.3291381 |