Design and Characterization of a Picosecond Timing ASIC in 55 nm CMOS

For more than two decades, amplifier-discriminator ASICs have been demonstrated to be the optimal choice for time measurement in high-energy physics experiments. With the requirement of time resolution further evolving towards the picosecond and sub-picosecond ranges, circuit innovation has become increasingly essential. We present a PIcoSecond Timing (PIST1) ASIC, utilizing the conventional amplifier-discriminator architecture and optimized for the readout of silicon photomultipliers (SiPMs) in the electromagnetic calorimeter (ECAL) for future Higgs factories such as the Circular Electron Positron Collider (CEPC). Further circuit developments are made to enable the ASIC to operate under minimal power with reduced supply voltage. A comprehensive analysis of the noise in the signal link is also conducted and the findings presented. A single-channel prototype is designed in 55 nm CMOS with a single 1.2 V supply voltage. The standalone ASIC testing highlights a time resolution of 4.20±0.04 ps for a minimum ionizing particle (MIP) which is equivalent to 32 pC charge. Additionally, a linear time-over-threshold (ToT) response from 1 to 12 MIP is attained and typical 15 mW power consumption realized.