High-throughput and low-latency ASIC implementation of lightweight cryptography

This paper presents high throughput and low latency ASIC implementation of a lightweight cryptography. Most of the lightweight algorithms are round-based design, whereby the high-throughput is achieved via the pipeline of the round functions. However, the response time is not ideal as such algorithm...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Sadiah, Shahidatul, Chun, Lee Jiah, Ismail, Ismahani, Rusli, Mohd Shahrizal, Syafiq, Mohd Usairy
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Algorithms Cryptography Design Encryption Gate counting Lightweight Optimization Power consumption Response time (computers)
Online-Zugang:	Volltext
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