Improving Output Voltage Swing in Cascode Current Mirrors

This work presents a technique to increase the output voltage swing of CMOS current mirrors which comprise stacked devices in their output branches, here generally referred as cascode current mirrors. The technique consists in replacing the primary output transistor by a network of four devices designed to anticipate the saturation onset. In such way, the cascode current mirror attains a reasonably higher-voltage compliance at its output, preserving other desirable features such as low output conductance and low mirroring error. The frequency bandwidth and power are not significantly affected. Simulation results on a 130-nm CMOS technology with 1.2-V supply voltage corroborate these observations: The increase in output voltage swing is within fifty to one hundred millivolts, while the increase in area is within 10–50% depending on circuit topology. This increase in area is much less than the resulting increase from re-dimensioning the circuit without the LSOT to achieve similar output voltage swing.