A body‐driven rail‐to‐rail 0.3 V operational transconductance amplifier exploiting current gain stages

Summary This paper presents a novel topology of ultra‐low voltage (ULV) operational transconductance amplifier (OTA), which exploits several design techniques to achieve high efficiency, symmetrical slew rate, good linearity, and robustness in spite of ultra‐low voltage operation. Simulations in a commercial 130‐nm CMOS technology with 0.3‐V supply voltage show the best reported small‐signal figure‐of‐merit among 0.3‐V OTAs, with a dc gain of 56.2 dB, a unity‐gain frequency of 26.2 kHz over a 150‐pF load capacitor, and a power consumption of 139.5 nW. A symmetrical slew rate of about 3.2 V/ms is achieved, and results are consistent under process, supply voltage and temperature variations, and device mismatches. This paper presents a novel topology of ultra‐low voltage (ULV) operational transconductance amplifier (OTA), which exploits several design techniques to achieve high efficiency, symmetrical slew rate, good linearity, and robustness in spite of ultra‐low voltage operation, attaining best reported small‐signal figure‐of‐merit among 0.3‐V OTAs, with a dc gain of 56.2 dB, a unity‐gain frequency of 26.2 kHz over a 150‐pF load capacitor, and a power consumption of 139.5 nW.